1. Field of the Invention
The present invention relates to a method for forming a triple well in a semiconductor device, and particularly to an improved method for forming a triple well in a semiconductor device which is capable of reducing a soft error rate, and improving a latch-up characteristic and a device isolation characteristic by forming a well through an ion implantation process without removing a nitride film after a field oxidation process of a semiconductor substrate.
2. Description of the Conventional Art
FIGS. 1A through 1D show vertical cross-sectional views of a semiconductor device having an MeV triple well structure formed using four masks. In this regard, description was given in SEMICON/Korea '95 Technical Symposium, page 112. As shown in FIG. 1A, a field oxidation film 2 is formed in a field region on a semiconductor substrate 1. A nitride film and a pad oxidation film are removed in an active region except for the field oxidation film 2. A new pad oxidation film (not shown) is formed. As shown in FIG. 1B, an n-shield mask 3 is formed on the semiconductor substrate 1 on which the field oxidation film 2 and the pad oxidation film (not shown) are formed, and an n-shield ion implantation layer 3a is formed in the semiconductor substrate 1 through an ion implantation using a high energy level. As shown in FIGS. 1C and 1D, an n-well and p-well masks 4 and 5 are formed on the semiconductor substrate 1, and a triple well is formed in the substrate 1 through the n-well and p-well ion implantation process, a channel stop ion implantation processes, and a threshold voltage adjusting ion implantation process.
Namely, in the conventional art, the field oxidation film 2 is formed on the semiconductor substrate 1 by a local oxidation of silicon (LOCOS) method. Thereafter, a new pad oxidation film is formed, and a high energy ion implantation process is performed so as to improve the characteristics of the soft error rate and latch-up, and a medium energy ion implantation process is performed so as to improve punch-through stop and device isolation characteristics, and then an n-well and p-well are formed. In addition, the threshold voltage adjusting ion implantation process is performed so as to satisfy the characteristics of the MOSFET device, and then a triple well is formed in the semiconductor substrate.
In accordance with the above-described triple well formation method of a semiconductor device, since the ion implantation process is performed using the n-well and p-well asks after removing the nitride film after the field oxidation process, the dopant which is inserted so as to improve the device isolation characteristic, as shown in FIGS. 1C and 1D, is formed at the bottom portion of the field oxidation film based on the shape of the field oxidation film. Namely, since the dopant is not formed at the edge portion of the field oxidation film, the device isolation characteristic is degraded.
In addition, when removing the nitride film after the field oxidation process and performing certain processes for forming an n-well and a p-well, since additional processes for removing the pad oxidation film and the new oxidation film are performed, the field oxidation film may be removed during the processes of removing the pad oxidation film and the newly formed oxidation film before the growth of a gate oxidation film, thus degrading the device isolation characteristic.